The present application relates to semiconductor memory cells and methods of forming the same. More particularly, the present application relates to non-volatile phase change memory cells and methods of forming such cells.
Non-volatile memory and volatile memory are two major groups of computer memory. Constant input of energy is required to retain information in volatile memory devices, but not in non-volatile memory devices. Examples of non-volatile memory devices include Read Only Memory, Flash Electrical Erasable Read Only Memory, Ferroelectric Random Access Memory, Magnetic Random Access Memory and Phase Change Memory. Examples of volatile memory include Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM).
One type of non-volatile memory that has been growing in recent years is Phase Change Memory (PCM). In PCM, information is stored in materials that can be manipulated into different phases, e.g., the amorphous phase and the crystalline phase. Such materials are referred to as phase change materials. The amorphous phase and the crystalline phase are typically two phases used for bit storage (I's and O's) since they have two detectable differences in electrical resistance. Notably, the amorphous phase has a higher resistance than the crystalline phase.
Glass chalcogenides are a group of materials commonly utilized as phase change materials. The aforementioned group of materials contains a chalcogen (i.e., an element from Group 16 of the Periodic Table of Elements) and a more electropositive element. Selenium (Se) and tellurium (Te) are the two most common semiconductors in the group used to produce a glass chalcogenide when creating a phase change memory cell. Examples of this include Ge2Sb2Te5 (GST), SbTe, and In2Se3. However, some phase change materials do not utilize a chalcogen but still can be used in such memory cells. Thus, a variety of materials can be used in a PCM cell so long as the material can retain separate amorphous and crystalline states.
Some PCM cells may include a material stack of, from bottom to top, a bottom electrode, a phase change memory material and a top electrode. The phase change memory material is typically formed in a via opening that is provided in a dielectric material or dielectric material stack. In such PCM cells, some portion of the PCM cell, such as, for example, the via opening, is required to have a feature size that is smaller than what standard lithography can achieve in order to obtain reasonable small programming power. One known method to make a reduced size opening is to utilize a keyhole transfer process. Another known method is to use a spacer inside the via opening.
Resistance drift of the amorphous region of the phase change material is a reliability concern, especially for a multilevel cell (MLC) PCM. One method to mitigate this resistance drift is to include a metal nitride liner in the PCM cell so that the read current path utilizes the metal nitride material and bypasses the amorphous region of the phase change material.
Despite the above advances with PCM cells, there is a need to provide PCM cells in which small programming power is obtained, without the PCM cell exhibiting the resistance drift that is normally associated with prior art PCM cells.